The present invention relates to the field of electronic circuits, and, more particularly, to current limiting devices, such as for use in a telephone network, for example.
A telephone network typically includes numerous switch offices which may be connected together via transmission lines, wireless links, etc. Switch offices are connected to individual local telephone subscribers by subscriber loops. Each loop includes tip and ring wires carrying signals from the switch office to the telephone and from the telephone to the switch office.
A subscriber line interface circuit (SLIC) is typically used as the primary interface between the subscriber loop and the switch office. A SLIC may include respective circuitry connected to the tip and ring lines. Because of the inductive nature of telephone lines, interruptions of ringing current, etc. can cause impulse noise on the lines. One method for controlling such impulse noise is to control the time and rate of switching on the loop using solid state switches connected to the tip and ring circuitry, for example. Such switches typically include one or two output metal oxide semiconductor (MOS) transistors, such as diffused MOS (DMOS) transistors, depending upon whether the switch is a unidirectional or a bidirectional switch, respectively.
When switching time and rate control is used, an accurate control of the switching delay and rise and fall times are required over the operating temperature of the switch, as well as over process variations associated with the manufacturing process. Furthermore, in such solid state switches, it is typically necessary to limit the current of the switch to protect against fault conditions, such as power surges, and to prevent the temperature of the switch from reaching critical limits which may cause premature failure.
Prior art current limiters for such solid state switches often include one or more sensing resistors which are used to set a current limit for the switch. One example of such a prior art switch is disclosed in U.S. Pat. No. 6,169,425 to Spires et al. entitled xe2x80x9cVoltage Sensing Current Foldback Switch Circuitxe2x80x9d. This circuit includes a voltage sensing circuit having a switch circuit for sensing a switch voltage and a switch current, a voltage comparison circuit connected to the switch circuit for comparing the switch voltage to a limiting voltage, and a current limiting circuit connected to the switch circuit and the voltage comparison circuit. The current limiting circuit is capable of limiting the switch current when the switch voltage reaches or exceeds the limiting voltage.
The current limit of such prior art switches will generally depend upon the ability to accurately control the value of the sensing resistor(s) during manufacture. Furthermore, the current limit in such switches may also vary with device temperature. That is, as the temperature increases, the current limit generally decreases. Yet, prior art switches typically do not allow the shape of the current limit versus temperature curve to be controlled sufficiently to provide adequate fault protection in certain applications.
Additionally, the delay and rise and fall times in prior art switches are typically controlled by controlling the magnitude and timing of the current driving the output MOS transistor(s). This method works reasonably well for controlling the delay time, but actual turn on and turn off times may not be adequately controlled in certain applications.
In view of the foregoing background, it is therefore an object of the invention to provide an integrated circuit and related method which provides enhanced control of current limit with respect to temperature as well as delay and switching time.
This and other objects, features, and advantages in accordance with the present invention are provided by an integrated circuit including first and second switch terminals, at least one output MOS transistor for selectively connecting the first and second switch terminals, and a driving current source for driving the at least one output MOS transistor.
The integrated circuit may also include a current limiter for limiting the driving of the at least one output MOS transistor by the driving current source to establish a current limit. Furthermore, a controller may be included for the current limiter to control the current limit.
More specifically, the controller may cause the current limiter to decrease the current limit based upon an increase in temperature of the integrated circuit. Also, the controller may cause the current limiter to decrease the current limit at periodic intervals to control rise and fall times of the at least one output MOS transistor.
The controller may include at least one control current source providing at least one control current to the current limiter and at least one limiting resistor connected between the at least one control current source and the at least one output MOS transistor. Further, the at least one control current source may include first and second control current sources.
According to one embodiment, the first control current source may be connected to the current limiter, the at least one MOS output transistor may have a conduction terminal connected to the first switch terminal, and the second control current source may be connected to the second switch terminal. A diode may connect the second control current source to the second switch terminal. Moreover, the first control current source may be a KT/Q current source, and the second control current source may be a VBE/R current source.
According to another embodiment, the at least one output MOS transistor may include first and second output MOS transistors connected in series between the first and second switch terminals. The current limiter may include first and second bipolar transistors for respectively controlling driving of the first and second MOS transistors by the driving current source. The first and second control current sources may each respectively be connected to the first and second bipolar transistors. Also, the at least one limiting resistor may include a first limiting resistor connected between the first control current source and the first output MOS transistor and a second limiting resistor connected between the second control current source and the second output MOS transistor.
Additionally, the current limiter may include at least one sensing resistor connected between the first and second switch terminals. The current limiter may control driving of the at least one output MOS transistor based upon a voltage drop across the at least one sensing resistor. Also, the at least one limiting resistor may have a greater resistance than the at least one sensing resistor.
A switch according to the invention for limiting a current on a telephone subscriber loop may include first and second switch terminals connected in series in the loop, at least one output MOS transistor for selectively connecting the first and second switch terminals, and a driving current source for driving the at least one output MOS transistor. The switch may also include a current limiter for limiting the driving of the at least one output MOS transistor by the current source to establish a current limit. Additionally, a controller may provide at least one control current to the current limiter so that the current limit changes based upon the at least one control current.
A method aspect of the invention is for limiting current in an integrated circuit comprising first and second switch terminals and at least one output MOS transistor for selectively connecting the first and second switch terminals. The method may include driving the at least one output MOS transistor using a driving current source, limiting the driving of the at least one output MOS transistor by the driving current source to establish a current limit, and controlling the current limit using a controller.
More specifically, controlling the current limit may include decreasing the current limit based upon an increase in temperature of the integrated circuit so that the current limit decreases. Controlling the current limit may also include decreasing the current limit at periodic intervals to control rise and fall times of the at least one output MOS transistor. Further, limiting the driving of the at least one output MOS transistor may include connecting at least one sensing resistor between the first and second switch terminals and driving the at least one output MOS transistor based upon a voltage drop across the at least one sensing resistor.